System and method for controlling switching power supply

ABSTRACT

A switching power supply includes a signal generator providing a selected signal according to a first signal and a second signal, a controller generating a modulation signal in response to the selected signal, and a power converter converting an input signal into an output signal in response to the modulation signal. The first signal has a first ripple amplitude, and the second signal has a second ripple amplitude less than the first ripple amplitude.

BACKGROUND

This present disclosure relates to integrated circuit devices, and moreparticularly to a switching power supply.

A conventional switching power supply includes a switching regulator tocontrol conversion of electrical power, and such a switching regulatorincludes one or more of switching elements operating in response to amodulation signal. Under a high frequency load transient condition, aswitching frequency of the modulation signal may exceed a nominaloperating frequency of the switching regulator, leading to an increaseof switching loss of the switching elements.

The conventional switching power supply may be a multi-phase powersupply, which includes a plurality of inductors. Under the highfrequency load transient condition, a current imbalance among aplurality of currents respectively flowing through the plurality ofinductors may occur, leading to an electrical and thermal stress on oneor more of the plurality of inductors.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates a switching power supply, according to an embodiment.

FIG. 2 illustrates a switching power supply, according to an embodiment.

FIG. 3 illustrates a ramp generator, according to an embodiment.

FIG. 4 illustrates waveforms related to an operation of the switchingpower supply of FIG. 2 in a steady state, according to an embodiment.

FIG. 5 illustrates a frequency detector, according to an embodiment.

FIG. 6 illustrates waveforms related to an operation of the frequencydetector of FIG. 5 under a load transient condition, according to anembodiment.

FIG. 7 illustrates a frequency determining circuit, according to anembodiment.

FIG. 8 illustrates a switching power supply, according to an embodiment.

FIG. 9 illustrates a switching power supply suitable, according to anembodiment.

FIG. 10 illustrates a switching power supply, according to anembodiment.

FIG. 11 illustrates a switching power supply suitable, according to anembodiment.

FIG. 12 illustrates a switching power supply, according to anembodiment.

DETAILED DESCRIPTION

FIG. 1 illustrates a switching power supply 100 according to anembodiment. The switching power supply 100 includes a signal generator180, a controller 141, and a power converter 150.

The power converter 150 converts an input signal (or an input voltage)Vin and provides an output signal (or an output voltage) Vout to a load.The load may include one or more integrated circuits (ICs). In anembodiment, the output voltage Vout is used as a supply voltage to oneor more of a Central Processing Unit (CPU), a Graphics Processing Unit(GPU), a memory integrated circuit, and the like.

The power converter 150 also provides a comparison signal COMP (or afirst signal) indicative of a level of the output voltage Vout to thesignal generator 180. In an embodiment, the power converter 150 includesan amplifier outputting the first signal COMP to the signal generator180. In an embodiment, the power converter 150 further includes acompensation network (not shown). For example, such a compensationnetwork may be connected to a node receiving the first signal COMP, afeedback signal and a ground, or connected to a node receiving the firstsignal COMP and the ground.

The signal generator 180 provides a selected signal SS according to thefirst signal COMP having a first ripple amplitude and according to asecond signal having a second ripple amplitude lower than the firstripple amplitude. For example, the first ripple amplitude is a peakmagnitude of the first signal COMP that deviates from a direct current(DC) value of the first signal COMP. The first signal COMP may have afirst frequency and the second signal has a second frequency lower thanthe first frequency. For example, the second signal has a dominantfrequency lower than a dominant frequency of the first signal COMP. Inan embodiment, the second signal is a filtered version of the firstsignal COMP, and the signal generator 180 provides the second signal asthe selected signal SS when the first frequency of the first signal COMPis equal to or greater than a threshold frequency.

In another embodiment, the second signal is a threshold signal (or athreshold voltage) V_(TH1) output from the controller 141, which is anadaptive DC voltage or a quasi-steady DC voltage. The signal generator180 provides the threshold signal V_(TH1) as the selected signal SS whenthe frequency of the first signal COMP is equal to or greater than thethreshold frequency.

The controller 141 generates a pulse width modulated (PWM) signal (or amodulation signal) PWM in response to the selected signal SS. In anembodiment, the controller 141 implements a ramp pulse modulation (RPM)scheme.

FIG. 2 illustrates a switching power supply 200 suitable for use as theswitching power regulator 100 of FIG. 1, according to an embodiment. Theswitching power supply 200 includes a driver and switch circuit 235, anoutput inductor 240, an output capacitor 250, a load 245, first andsecond resistors 255 and 260, an error amplifier 265, a referencevoltage source 270, a signal generator 280, and a controller 241. Thecontroller 241 includes a threshold generator 205, a ramp generator 210,first and second comparators 215 and 225, and a set/reset (RS) flip-flop230.

The switching power supply 200 receives an input voltage Vin andconverts the received input voltage Vin into an output voltage Vout.Although the switching power supply 200 shown in FIG. 2 includes a DC-DCbuck converter, embodiments of the present disclosure are not limitedthereto. In an embodiment, the switching power supply 200 includes aboost converter, a buck-boost converter, a boost-buck converter, aflyback converter, or the like.

The threshold generator 205 generates a threshold signal (or a thresholdvoltage) V_(TH0), which is a DC voltage or a quasi-steady DC voltageplus a ripple voltage. In an embodiment, the threshold generator 205generates the threshold voltage V_(TH0) according to the output voltageVout and an offset voltage Vos. For example, the threshold voltageV_(TH0) output from the threshold generator 205 can be represented byEquation 1 below:V _(TH0) =A ₁ V _(out) +V _(os)  Equation 1.

In Equation 1, A₁ denotes a first scaling factor. In an embodiment, theoutput voltage Vout may be a source of the ripple voltage. In anotherembodiment, the ripple voltage may be generated and added into thethreshold voltage V_(TH0).

In an embodiment, the threshold generator 205 includes a resistordivider (not shown) receiving the output voltage Vout and generating adivided version of the output voltage Vout according to a predeterminedratio. The threshold generator 205 further includes an adder (not shown)that adds the divided version of the output voltage Vout and the offsetvoltage Vos.

The ramp generator 210 generates a ramp signal (or a ramp voltage)V_(RAMP). In an embodiment, the ramp generator 210 generates the rampvoltage V_(RAMP) according to the input voltage Vin, the offset voltageVos, and a modulation signal PWM. The ramp signal V_(RAMP) ramps up whenthe modulation signal PWM has an ON value (e.g. a high value) and isclamped to ground or an offset voltage Vos when the modulation signalPWM has an OFF value (e.g. a low value). The ramp slew rate when themodulation signal PWM has the ON value may be proportional to the inputvoltage Vin to provide an input feedforward function.

FIG. 3 illustrates a ramp generator 310 suitable for use as the rampgenerator 210 of FIG. 2 according to an embodiment. The ramp generator310 includes an adjustable current source 320 that operates in responseto an input voltage Vin (e.g., the input voltage Vin of FIG. 2). Theramp generator 210 further includes a capacitor 330, an inverter 340,and a switching device 350 having a gate terminal that receives aninverted version of a modulation signal PWM (e.g., the modulation signalPWM of FIG. 2).

During an on-time of the modulation signal PWM, the switching device 350is turned off and the adjustable current source 320 charges thecapacitor 330 to increase a level of a ramp voltage V_(RAMP). During anoff-time of the modulation signal PWM, the switching device 350 isturned on and the level of the ramp voltage RAMP is maintainedsubstantially equal to the offset voltage Vos (e.g., the offset voltageVos of FIG. 2).

Referring back to FIG. 2, the first comparator 215 has a negativeterminal receiving the threshold voltage V_(TH0) and a positive terminalreceiving a first comparison signal (or a first signal) COMP, which isoutput from the error amplifier 265. The first comparator 215 comparesthe threshold voltage V_(TH0) and the first comparison signal COMP, andoutputs a signal indicative of the comparison result to a Set (S) inputof the Reset-Set (RS) flip-flop 230.

The second comparator 225 has a positive terminal receiving the rampvoltage V_(RAMP) and a negative terminal receiving a selected signal SS.The second comparator 225 compares the ramp voltage V_(RAMP) and theselected signal SS, ant outputs a signal indicative of the comparisonresult to a Reset (R) input of the RS flip-flop 230. The RS flip-flop230 generates the modulation signal PWM in response to the comparisonresults from the first and second comparators 215 and 225.

An operation of the switching power supply of FIG. 2 in a steady statewill be described below with reference to FIG. 4. FIG. 4 illustrateswaveforms of the first comparison signal COMP, the threshold voltageV_(TH0), and the ramp voltage V_(RAMP) when the second comparator 225receives the first comparison signal COMP as the selected signal SS.

At a first time t₁, the first comparison signal COMP reaches thethreshold voltage V_(TH0), and thus the first comparator 215 causes theRS flip-flop 230 to output the modulation signal PWM indicative of afirst logic value (e.g., a logic high value). As a result, a switchingdevice (not shown) included in the driver and switch circuit 235 isturned on to cause a current Iout to flow through the inductor 240. Whenthe current Iout initially increases, the inductor 240 produces anopposing voltage across its terminals, resulting in a decrease in theoutput voltage Vout to increase the first comparison signal COMP. Then,when a rate of change in the current Iout decreases, the producedvoltage across the inductor 240 decreases, resulting in an increase inthe output voltage Vout to decrease the first comparison signal COMP.

At a second time t2, the first comparison signal COMP reaches the rampvoltage V_(RAMP), and thus the second comparator 225 causes the RSflip-flop 230 to output the modulation signal PWM indicative of a secondlogic value (e.g., a logic low value). When the modulation signal PWMhas the second logic low value, the ramp generator 210 generates theramp voltage V_(RAMP) having a level substantially equal to the offsetvoltage Vos.

Under a load transient condition, the switching power supply 200 maychange a pulse width t_(on) and a switching frequency of the modulationsignal PWM. When a load transient frequency is lower than a thresholdfrequency, an average value of the switching frequency of the modulationsignal PWM remains proximate to a nominal operating frequency of theswitching power supply 200. In an embodiment, the threshold frequency isin a range from 30% to 50% of a nominal operating frequency of theswitching power supply 200.

However, when the load transient frequency is substantially equal to orgreater than the threshold frequency, the average value of the switchingfrequency of the modulation signal PWM may increase to exceed thenominal operating frequency of the switching power supply 200. Thedriver and switch circuit 235 includes one or more of switching elements(not shown) and switching loss of these switching elements (not shown)is proportional to the switching frequency of the modulation signal PWM.Thus, such a high switching frequency of the modulation signal PWMincreases the switching loss of the switching elements in the driver andswitch circuit 235.

In order to address the above issues, referring back to FIG. 2, thesignal generator 280 receives the first comparison signal COMP andgenerates a second comparison signal (or a second signal) COMP_flt thathas a ripple amplitude lower than the first comparison signal COMP. Thesecond comparison signal COMP_flt has a frequency lower than the firstcomparison signal COMP. When the frequency of the first comparisonsignal COMP, which corresponds to the load transient frequency, is lowerthan the threshold frequency, the signal generator 280 outputs the firstcomparison signal COMP to the negative terminal of the second comparator225 as the selected signal SS. When the frequency of the firstcomparison signal COMP is equal to or greater than the thresholdfrequency, the signal generator 280 outputs the second comparison signalCOMP_flt to the negative terminal of the second comparator 225 as theselected signal SS.

The signal generator 280 includes a filter resistor 297, a filtercapacitor 295, a first switching device 290, an inverter 275, a secondswitching device 293, and a frequency detector 203. A low-pass filterincluding the filter resistor 297 and the filter capacitor 295 generatesthe second comparison signal COMP_flt having the ripple amplitude lowerthan the first comparison signal COMP. In an embodiment, a time constantof the low-pass filter is equal to or greater than 3 times of a nominalPWM switching period of the switching power supply 200.

The frequency detector 203 compares the frequency of the firstcomparison signal COMP to the threshold frequency and outputs atransition signal HFTRAN in response to the comparison result. When thefrequency of the first comparison signal COMP is less than the thresholdfrequency, the frequency detector 203 outputs the transition signalHFTRAN indicative of a first logic value (e.g., a logic low value). As aresult, the first switching device 290 is turned off and the secondswitching device 293 is turned on to provide the first comparison signalCOMP as the selected signal SS to the second comparator 225.

When the frequency of the first comparison signal COMP is equal to orgreater than (i.e., not less than) the threshold frequency, thefrequency detector 203 outputs the transition signal HFTRAN indicativeof a second logic value (e.g., a logic high value). As a result, thefirst switching device 290 is turned on and the second switching device293 is turned off to provide the second comparison signal COMP_flt asthe selected signal SS to the second comparator 225.

When the frequency of the first comparison signal COMP is equal to orgreater than the threshold frequency, the modulation signal PWM isgenerated using the second comparison signal COMP_flt that has theripple amplitude lower than the first comparison signal COMP, and thusthe switching frequency of the modulation signal PWM remains proximateto the nominal operating frequency. As a result, the switching loss ofthe switching elements of the driver and switch circuit 235 is reducedcompared to a conventional switching power supply, leading to less powerconsumption of the switching power supply 200 according to anembodiment.

FIG. 5 illustrates a frequency detector 503 suitable for use as thefrequency detector 203 of FIG. 2. The frequency detector 503 includes aresistor 510, a capacitor 520, a current source 530, a comparator 540, aone-shot pulse generator 550, a frequency determining circuit 560.

The frequency detector 503 receives the first comparison signal COMP andgenerates a filtered version (or a filtered signal) COMP_Ft of the firstcomparison signal COMP using a low-pass filter that includes theresistor 510 and the capacitor 520. In an embodiment, a time constant ofthe low-pass filter is equal to or greater than the nominal switchingperiod of a switching power supply. In another embodiment, a frequencydetector (not shown) receives an output signal (e.g., the output signalVout of FIG. 2), instead of the first signal COMP, and generates afiltered version of the output signal.

The frequency determining circuit 560 outputs a transition signal HFTRANindicative of a logic high value, when a frequency of a pulse signal FTis equal to or greater than (i.e., not less than) a threshold frequency.In another embodiment, the frequency determining circuit 560 outputs thetransition signal HFTRAN indicative of the logic high value, when thepulse signal F_(T) is in a predetermined high frequency range. Forexample, when the pulse signal F_(T) is in a range from 80% to 120% ofan integer multiple of the nominal switching frequency, the outputsignal HFTRAN indicates the logic high value.

The current source 530 causes a current It to flow through the resistor510 to a ground. Thus, the filtered signal COMP_Ft has a DC value, whichis smaller than a DC value of the first comparison signal COMP by anoffset value OV. The offset value OV is substantially equal to themultiplied value of a resistance value Rt of the resistor 510 and amagnitude of the current It. The offset value OV is determined to besufficiently large to prevent the first comparison signal COMP fromintersecting the filtered signal COMP_Ft when a switching power supply(e.g., the switching power supply 200 of FIG. 2) operates in asteady-state. For example, the offset value OV is greater than a half ofan amplitude of the first comparison signal COMP in the stead state. Inan embodiment, the offset value OV is in a range from 50 mV to 100 mV.

An operation of the frequency detector 503 under a load transientcondition will be described below with reference to FIG. 6. Under theload transient condition, the amplitude of the first comparison signalCOMP increases by a sufficiently large magnitude and at a sufficientlylarge slew rate to intersect the filtered signal COMP_Flt. Atintersecting points in time, the comparator 540 provides an outputsignal indicative of a logic high value, and thus the one-shot pulsegenerator 550 generates a pulse signal Ft in response to the providedoutput signal. Because the first comparison signal COMP becomes smallerthan the filtered signal COMP_Ft at a frequency substantially equal to aload transient frequency, the one-shot pulse generator 550 provides thepulse signal Ft at the frequency substantially equal to the loadtransient frequency to the frequency determining circuit 560.

FIG. 7 illustrates a frequency determining circuit 760 suitable for useas the frequency determining circuit 560 of FIG. 5. The frequencydetermining circuit 760 includes first and second one-shot pulsegenerators 710 and 740, a reference pulse generator 730, first andsecond current sources 720 and 780, first and second switching devices750 and 760, a capacitor 770, a threshold voltage source 795, and acomparator 790.

The first one-shot pulse generator 710 receives a pulse signal F_(T)(e.g., the pulse signal F_(T) of FIG. 5) having a load transientfrequency and outputs a first control pulse signal PCNT1 having apredetermined width and a frequency substantially equal to the loadtransient frequency. In an embodiment, the first one-shot pulsegenerator 710 outputs the first control pulse signal PCNT1 indicative ofa logic high value in response to a rising edge of the received pulsesignal F_(T).

During an on-time of the first control pulse signal PCNT1, the firstswitching device 750 is turned on to cause a first current Is1 to flowinto the capacitor 770. As a result, the capacitor 770 is charged and anintermediate voltage VINT at a first end of the capacitor 770 increasesduring the on-time of the first control pulse signal PCNT1.

The second one-shot pulse generator 740 receives a reference pulsesignal F_(R) having a threshold frequency and outputs a second controlpulse signal PCNT2 having a predetermined width and a frequencysubstantially equal to the threshold frequency. In an embodiment, thesecond one-shot pulse generator 740 outputs the second control pulsesignal PCNT2 indicative of the logic high value in response to a risingedge of the received reference pulse signal F_(R).

During an on-time of the second control pulse signal PCNT2, the secondswitching device 760 is turned on to cause a second current Is2 to flowfrom the capacitor 770 to a ground. As a result, the capacitor 770 isdischarged and the intermediate voltage VINT at the first end of thecapacitor 770 decreases during the on-time of the second control pulsesignal PCNT2.

In an embodiment, the first current Is1 has a magnitude substantiallyequal to the second current Is2, and the on-time of the first controlpulse signal PCNT1 is substantially equal to the on-time of the secondcontrol pulse signal PCNT2. Thus, when the frequency of the firstcontrol pulse signal PCNT1 is greater than the frequency of the secondcontrol pulse signal PCNT2, the intermediate voltage VINT at the firstend of the capacitor 770 increases as a number of cycles of the firstcontrol pulse signal PCNT1 increases. Because the frequency of the firstcontrol pulse signal PCNT1 is substantially equal to the load transientfrequency and the frequency of the second pulse control signal PCNT2 issubstantially equal to the threshold frequency, the intermediate voltageVINT increases when the load transient frequency is greater than thethreshold frequency.

When the increased intermediate voltage VINT exceeds a threshold voltageVth, the comparator 790 outputs a transition signal HFTRAN (e.g., thetransition signal HFTRAN of FIGS. 2 and 5) indicative of a logic highvalue. When the frequency determining circuit 760 outputs the transitionsignal HFTRAN indicative of the logic high value, a signal generator(e.g., the signal generator 280 of FIG. 2) including the frequencydetermining circuit 760 selects a signal (e.g., the second comparisonsignal COMP_flt of FIG. 2) other than another signal (e.g., the firstcomparison signal COMP of FIG. 2) output from an amplifier (e.g., theerror amplifier 265 of FIG. 2). The selected signal has a rippleamplitude that is sufficiently low to keep a switching frequency of amodulation signal (e.g., the modulation signal PWM of FIG. 2) proximateto a nominal operating frequency. As a result, power consumption of aswitching power supply (e.g., the switching power supply 200 of FIG. 2)according to an embodiment is reduced compared to a conventionalswitching power supply.

FIG. 8 illustrates a switching power supply 800 suitable for use as theswitching power regulator 100 of FIG. 1 according to an embodiment. Theswitching power supply 800 of FIG. 8 differs from the switching powersupply 200 of FIG. 2 in that, in FIG. 8, a threshold generator 805generates first and second threshold signals (or first and secondthreshold voltages) V_(TH0) and V_(TH1) and a signal generator 880selects one of the second threshold signal V_(TH1) and a comparisonsignal COMP as a selected signal SS.

The threshold generator 805 provides the first threshold signal V_(TH0),which is substantially the same as the threshold voltage V_(TH0) of FIG.2, to a first comparator 815. The threshold generator 805 furtherprovides the second threshold signal V_(TH1), which is a DC voltage or aquasi-steady DC voltage, to the signal generator 880. In an embodiment,the second threshold signal V_(TH1) has a DC level substantially equalto an averaged DC level of the first threshold signal V_(TH0).

An operation of the signal generator 880 is similar to that of thesignal generator 280 described above with reference to FIGS. 2-7, exceptthat the signal generator 880 selects the second threshold signalV_(TH1) as the selected signal SS, rather than a filtered signal (e.g.,the second comparison signal COMP_flt of FIG. 2), when the frequency ofthe comparison signal COMP is equal to or greater than a thresholdfrequency. Thus, detailed descriptions of the operation of the signalgenerator 880 will be omitted herein for the interest of brevity.

FIG. 9 illustrates a switching power supply 900 suitable for use as theswitching power regulator 100 of FIG. 1 according to an embodiment. Theswitching power supply 900 of FIG. 9 differs from the switching powersupply 200 of FIG. 2 in that, in FIG. 9, a signal generator 980 includesfirst and second variable resistors 937 and 947, rather than the firstand second switching devices 290 and 293 and the inverter 275.

The signal generator 980 includes a frequency detector 903, whichdetects a frequency of a comparison signal COMP output from an erroramplifier 965 and generates first and second resistance control signalsRCNT1 and RCNT2 according to the detected frequency of the comparisonsignal COMP. The frequency detector 903 adjusts a ratio of a resistancevalue R3 over the first variable resistor 937 and a resistance value R4of the second variable resistor 947 according to the detected frequencyof the comparison signal COMP.

When the frequency of the comparison signal COMP increases, thefrequency detector 903 decreases the resistance value R3 of the firstvariable resistor 937 and increases the resistance value R4 of thesecond variable resistor 947, leading to a decrease in the ratio of theresistance value R3 over the resistance value R4. As a result, a firstcomponent of the selected signal SS resulting from the comparison signalCOMP gains less weight than a second component of the selected signal SSresulting from the filtered comparison signal COMP_flt.

The frequency detector 903 adjusts the ratio of the resistance value R3over the resistance value R4 discretely. In an embodiment, when thefrequency of the comparison signal COMP is less than the thresholdfrequency, the resistance value R3 of the first variable resistor 937 isin a first range from 90 kΩ to 100 kΩ and the resistance value R4 of thesecond variable resistor 947 is in a second range from 0Ω to 10 kΩ Insuch an embodiment, when the frequency of the comparison signal COMP isequal to or greater than the threshold frequency, the resistance valueR3 of the first variable resistor 937 is in the second range from 0Ω to10 kΩ and the resistance value R4 of the second variable resistor 947 isin the first range from 90 kΩ to 100 kΩ. Each of the variable first andsecond variable resistors 937 and 947 includes a switch and resistors.When the first resistance control signal RCNT1 has a logic high value,the switch in the first variable resistor 937 is closed and theresistance value R3 of the first variable resistor is reduced comparedto when the first resistance control signal RCNT1 has a logic low value.

Although the frequency detector 903 according to the above-describedembodiment adjusts the ratio of the resistance value R3 over theresistance value R4 in a single step, embodiments of the presentdisclosure are not limited thereto. In other embodiments, the frequencydetector 903 adjusts the ratio of the resistance value R3 over theresistance value R4 in a plurality of steps.

In another embodiment, a frequency detector (not shown) adjusts theratio of the resistance value R3 over the resistance value R4continuously. For example, the frequency detector adjusts the ratiosubstantially linearly according to the frequency of the comparisonsignal COMP. In such an embodiment, the frequency detector (not shown)outputs the first and second resistance control signal RCNT1 and RCNT2that are analog signals instead of digital signals, and thus changes theconduction resistances of the switches in the first variable resistor937 and the second variable resistor 947, respectively. For example, thefrequency detector (not shown) is configured to increase a level of thefirst resistance control voltage RCNT1 and decrease a level of thesecond control voltage RCNT2, when a frequency of a pulse signal (e.g.,the pulse signal F_(T) of FIG. 5) increases.

FIG. 10 illustrates a switching power supply 1000 suitable for use asthe switching power regulator 100 of FIG. 1 according to an embodiment.The switching power supply 1000 of FIG. 10 differs from the switchingpower supply 900 of FIG. 9 in that, in FIG. 10, a threshold generator1005 generates first and second threshold signals (or first and secondthreshold voltages) V_(TH0) and V_(TH1).

When a frequency of a comparison signal COMP increases, a frequencydetector 1003 decreases a resistance value R3 of a first variableresistor 1037 and increases a resistance value R4 of a second variableresistor 1047, leading to a decrease in the ratio of the resistancevalue R3 over the resistance value R4. As a result, a first component ofthe selected signal SS resulting from the comparison signal COMP gainsless weight than a second component of the selected signal SS resultingfrom the second threshold signal V_(TH1).

FIG. 11 illustrates a switching power supply 1100 suitable for use asthe switching power regulator 100 of FIG. 1 according to an embodiment.The switching power supply 1100 includes a frequency controller 1101, asmall variation on-time controller 1111, a large variation on-timecontroller 1121, first and second logic gates (or first and second ANDgates) 1131 and 1141, an inverter 1175, a frequency detector 1103, andan RS flip-flop 1130. The frequency controller 1101 generates an outputsignal according to a comparison signal COMP and provides the generatedoutput signal as a set signal PWMS to the RS flip-flop 1130.

An operation of the frequency detector 1103 is similar to that of thefrequency detector 503 described above with reference to FIGS. 5-7.Thus, detailed descriptions of the operation of the frequency detector1103 will be omitted herein for the interest of brevity.

When a load transient frequency is lower than a threshold frequency, thefrequency detector 1103 outputs a transition signal HFTRAN indicative ofa first logic value (e.g., a logic low value). The inverter 1175provides an inverted version of the transition signal HFTRAN indicativeof a second logic value (e.g., a logic high value) to the second ANDgate 1141. The large variation on-time controller 1121 provides a firstreset control signal RCNT1, which has an on-time varying according tothe comparison signal COMP, to the second AND gate 1141. Thus, when thefirst reset control signal RCNT1 indicates the logic high value, thesecond AND gate 1141 provides an output signal indicative of the logichigh value as a reset signal PWMR to the RS flip-flop 1130.

When the load transient frequency is equal to or greater than thethreshold frequency, the frequency detector 1103 outputs the transitionsignal HFTRAN indicative of the logic high value. The small variationon-time controller 1111 provides a second reset control signal RCNT2,which has a substantially constant on-time, to the first AND gate 1131.Thus, when the second reset control signal RCNT2 indicates the logichigh value, the first AND gate 1131 provides an output signal indicativeof the logic high value as the reset signal PWMR to the RS flip-flop1130. Because the RS flip-flop 1130 uses the second reset control signalRCNT2 having the substantially constant on-time as the reset signal PWMRto generate a modulation signal PWM, a switching frequency of themodulation signal PWM remains proximate to a nominal operatingfrequency.

FIG. 12 illustrates a switching power supply 1200 suitable for use asthe switching power regulator 100 of FIG. 1 according to an embodiment.The switching power supply 1200 is a multi-phase power supply, whichincludes a plurality of RS flip-flops 1230-1 to 1230-n, a plurality ofdriver and switch circuits 1235-1 to 1235-n, a plurality of secondcomparators 1225-1 to 1225-n, a plurality of inductors L1 to Ln, and asignal generator 1280. The switching power supply 1200 further includesan Error Amplifier (EA) 1204, an error comparator 1208, a clockmanagement circuit 1218, a plurality of one-shot circuits 1220, and anOR gate 1222, and a Current Sense plus Ramp (CSR) generator 1224.

The EA 1204 receives an output voltage Vout and a reference voltage VDACand generates a comparison signal COMP with a value proportional to adifference between the output voltage Vout and the reference voltageVDAC. The error comparator 1208 compares the comparison signal COMP to afirst threshold signal V_(TH0) and outputs a compare high signal COMP_Hhaving a high value when the comparison signal COMP is higher that thefirst threshold signal V_(TH0) and having a low value otherwise.

The clock management circuit 1218 receives a pulse signal PWM_MLT andgenerates first to n^(th) phase select signals D1 to Dn. During aninitialization, the clock management circuit 1218 sets the first phaseselect signal D1 to an active state (e.g. a high state) and sets thesecond to n^(th) phase select signal D2 to Dn to an inactive (e.g. low)state, indicating that the first phase is a selected phase.Subsequently, when an i^(th) phase select signal D(i) has the activestate, i is less than a number of phases n, and a pulse is received onthe pulse signal PWM_MLT, the clock management circuit 1218 sets thei^(th) phase select signal Di to the inactive state and sets the(i+1)^(th) phase select signal Di+1 to the active state. When the i^(th)phase select signal Di has the active state, i is equal to or smallerthan the number of phases n, and a pulse is received on the pulse signalPWM_MLT, the clock management circuit 1218 sets the n^(th) phase selectsignal Dn to the inactive state and the first phase select signal D1 tothe active state.

Accordingly, the clock management circuit 1218 sets only one of thefirst to n^(th) phase select signals D1 to Dn to the active state (i.e.,as the active phase) at any time. The clock management circuit 1218steps through the first to n^(th) phase select signals D1 to Dn settingeach to the active state (i.e., as the active phase) in turn when apulse is received on the pulse signal PWM_MLT.

The plurality of one-shot (OS) circuits 1220 respectively receive firstto n^(th) PWM signals PWM1 to PWMn and respectively generate a pulse inresponse to positive edges of the first to n^(th) PWM signals PWM1 toPWMn. In an embodiment, the pulse has a high value (e.g., a logical highvalue).

The OR gate 1222 receives the output signals of the plurality ofone-shot circuits 1220 and generates the pulse signal PWM_MLT having avalue equal to a logical OR of the values of the outputs of theplurality of one-shot circuits 1220. As a result, whenever any of theplurality of one-shot circuits 1220 generates a pulse having a highvalue on its output signal, the OR gate 1222 generates a pulse having ahigh value on the PWM signal PWM_MLT.

The CSR signal generator 1224 receives first to n^(th) current sense(CS) signals CS1 to CSn, the first to n^(th) PWM signals PWM1 to PWMn,and an input voltage Vin. The CSR signal generator 224 generates firstto n^(th) CSR signals RAMP1 to RAMPn according to the received signals.

The CSR signal generator 1224 generates the first CSR signal RAMP1according to the first CS signal CS1, the first PWM signal PWM1, and theinput voltage Vin. When the first PWM signal PWM1 has a low value,indicating that a first phase is in an inductor discharging state, theCSR signal generator 1224 generates the first CSR signal RAMP1 having avalue equal to a DC offset voltage plus a voltage proportional to avalue of the first CS signal CS1. When the first PWM signal PWM1 has ahigh value, indicating that the first phase is in an inductor chargingstate (i.e., on), the CSR signal generator 1224 increases the value ofthe first CSR signal RAMP1 at a rate proportional to the input voltageVin. Thus, when the first PWM signal PWM1 has the high value, the firstCSR signal RAMP1 has a value equal to a voltage proportional to thevalue of the first CS signal CS1 plus a value of a ramp that increaseswith time.

The CSR signal generator 1224 generates the second CSR signal RAMP2according to the second CS signal CS2, the second PWM signal PWM2, andthe input voltage Vin, in a manner analogous to how the CSR signalgenerator 1224 generates the first CSR signal RAMP1. The CSR signalgenerator 1224 generates the n^(th) CSR signal RAMP2 according to then^(th) CS signal CSn, the n^(th) PWM signal PWMn, and the input voltageVin, in a manner analogous to how the CSR signal generator 1224generates the first CSR signal RAMP1. Each of the first to n^(th) CSRsignals RAMP1 to RAMPn is generated independently of others of the firstto n^(th) CSR signals RAMP1 to RAMPn.

An operation of the signal generator 1280 is similar to that of thesignal generator 880 described above with reference to FIG. 8, exceptthat the signal generator 1280 provides a selected signal SS to theplurality of second comparators 1225-1 to 1225-n, rather than a singlesecond comparator (e.g., the second comparator 825 of FIG. 8). Thus,detailed descriptions of the operation of the signal generator 1280 willbe omitted herein for the interest of brevity.

In the switching power supply 1200 including the signal generator 1280,a current imbalance among a plurality of currents I_(L1) to I_(Ln),which respectively flow through the plurality of inductors L1 to Ln, isreduced compared to a conventional n-phase switching power supply. Forexample, a difference between two DC levels of a pair of the pluralityof currents I_(L1) to I_(Ln) is smaller compared to a correspondingdifference in the conventional n-phase switching power supply. As aresult, an electrical and thermal stress due to the current imbalance onone or more of the plurality of inductors L1 to Ln is reduced comparedto the conventional n-phase switching power supply.

Although the switching power supply 1200 includes the signal generator1280, which has substantially the same configuration as the signalgenerator 880 of FIG. 8, embodiments of the present disclosure are notlimited thereto. In other embodiments, the switching power supply 1200includes the signal generator 1280, which has substantially the sameconfiguration as the signal generator 280 of FIG. 2, the signalgenerator 980 of FIG. 9, or the signal generator 1080 of FIG. 10.

Aspects of the present disclosure have been described in conjunctionwith the specific embodiments thereof that are proposed as examples.Numerous alternatives, modifications, and variations to the embodimentsas set forth herein may be made without departing from the scope of theclaims set forth below. Accordingly, embodiments as set forth herein areintended to be illustrative and not limiting.

What is claimed is:
 1. A switching power supply comprising: a signalgenerator receiving a first signal, generating a second signal using thefirst signal, and providing one of the first signal and the secondsignal as a selected signal based on a first frequency of the firstsignal, the first signal having a first ripple amplitude, the secondsignal having a second ripple amplitude less than the first rippleamplitude; a controller generating a modulation signal in response tothe selected signal; and a power converter converting an input signalinto an output signal in response to the modulation signal.
 2. Theswitching power supply of claim 1, wherein the first frequency of thefirst signal is higher than a second frequency of the second signal, andwherein the signal generator provides the second signal as the selectedsignal in response to the first signal having the first frequency thatis equal to or greater than a threshold frequency.
 3. The switchingpower supply of claim 1, wherein the signal generator provides the firstsignal as the selected signal in response to the first signal having thefirst frequency that is lower than a threshold frequency.
 4. Theswitching power supply of claim 1, wherein the signal generator includesa frequency detector comparing the first frequency of the first signalto a threshold frequency and generating a transition signal according tothe comparison result.
 5. The switching power supply of claim 4, whereinthe comparison result is a first comparison result, and wherein thefrequency detector includes: a low-pass filter converting the firstsignal into a filtered signal; an offset circuit causing the filteredsignal to have a DC value that is lower than a DC value of the firstsignal by a predetermined offset value; a first comparator comparing thefirst signal and the filtered signal to output a second comparisonresult; a first one-shot pulse generator generating a pulse signal inresponse to the second comparison result; and a frequency determiningcircuit generating the transition signal in response to the pulsesignal.
 6. The switching power supply of claim 5, wherein the frequencydetermining circuit includes: a second one-shot pulse generatorgenerating a first control pulse signal in response to the pulse signal;a third one-shot pulse generator generating a second control pulsesignal in response to a reference pulse signal; a capacitor having afirst end and a second end, the second end being connected to a ground;a first switching device causing a first current to flow into thecapacitor to charge the capacitor in response to the first control pulsesignal; a second switching device causing a second current to flow fromthe capacitor to discharge the capacitor in response to the secondcontrol pulse signal; and a second comparator comparing an intermediatevoltage at the first end of the capacitor to a threshold voltage tooutput the transition signal.
 7. The switching power supply of claim 4,wherein the signal generator further includes: a low-pass filterconverting the first signal into the second signal; a first switchingdevice transmitting the second signal as the selected signal in responseto the transition signal having a first logic value; and a secondswitching device transmitting the first signal as the selected signal inresponse to the transition signal having a second logic value.
 8. Theswitching power supply of claim 7, wherein the controller includes: afirst comparator comparing the first signal to a threshold signal andoutputting a set signal; a second comparator comparing the selectedsignal to a ramp signal and outputting a reset signal; and a flip-flopgenerating the modulation signal in response to the set signal and thereset signal.
 9. The switching power supply of claim 4, wherein theselected signal is a reset signal, wherein the controller includes: afirst on-time controller generating a first reset control signal inresponse to the first signal; and a second on-time controller generatinga second reset control signal, an on-time of the second reset controlsignal being substantially constant, and wherein the signal generatorfurther includes: a first logic gate providing a first logic outputsignal as the reset signal in response to the first reset control signaland the transition signal having a first logic value; and a second logicgate providing a second logic output signal as the reset signal inresponse to the second reset control signal and the transition signalhaving a second logic value.
 10. The switching power supply of claim 4,wherein the controller includes a threshold generator generating athreshold signal, and wherein the signal generator further includes: afirst switching device transmitting the threshold signal as the selectedsignal in response to the transition signal having a first logic value;and a second switching device transmitting the first signal as theselected signal in response to the transition signal having a secondlogic value.
 11. The switching power supply of claim 1, wherein thesignal generator includes a frequency detector comparing the firstfrequency of the first signal to a threshold frequency and generatingfirst and second resistance control signals in response to thecomparison result.
 12. The switching power supply of claim 11, whereinthe signal generator further includes: a low-pass filter converting thefirst signal into the second signal; a first variable resistortransmitting a portion of the first signal as a first component of theselected signal in response to the first resistance control signal; anda second variable resistor transmitting a portion of the second signalas a second component of the selected signal in response to the secondresistance control signal.
 13. The switching power supply of claim 12,wherein the first variable resistor has a first resistance value and asecond variable resistor has a second resistance value, and wherein aratio of the first resistance value over the second resistance valueincreases in response to the first signal having the first frequencythat is equal to or greater than the threshold frequency.
 14. Theswitching power supply of claim 11, wherein the controller includes athreshold generator generating a threshold signal, and wherein thesignal generator further includes: a first variable resistortransmitting a portion of the first signal as a first component of theselected signal in response to the first resistance control signal; anda second variable resistor transmitting a portion of the thresholdsignal as a second component of the selected signal in response to thesecond resistance control signal.
 15. A method for controlling aswitching power supply, the method comprising: generating a secondsignal based on a first signal, the first signal having a first rippleamplitude, the second signal having a second ripple amplitude less thanthe first ripple amplitude; providing one of the first signal and thesecond signal as a selected signal based on a first frequency of thefirst signal; generating a modulation signal in response to the selectedsignal; and converting an input signal to an output signal in responseto the modulation signal.
 16. The method of claim 15, wherein the firstfrequency of the first signal is higher than a second frequency of thesecond signal, the method further comprising: providing the secondsignal as the selected signal in response to the first signal having thefirst frequency that is equal to or greater than a threshold frequency.17. The method of claim 15, further comprising: comparing the firstfrequency of the first signal to a threshold frequency; and generating atransition signal in response to the comparison result.
 18. The methodof claim 17, wherein the comparison result is a first comparison result,and wherein comparing the first frequency of the first signal to thethreshold frequency includes: converting the first signal into afiltered signal; causing the filtered signal to have a DC value that islower than a DC value of the first signal by a predetermined offsetvalue; comparing the first signal and the filtered signal to output asecond comparison result; and generating a pulse signal in response tothe second comparison result.
 19. The method of claim 18, whereingenerating the transition signal includes: generating a first controlpulse signal in response to the pulse signal; generating a secondcontrol pulse signal in response to a reference pulse signal; causing afirst current to flow into a capacitor to charge the capacitor inresponse to the first control pulse signal; causing a second current toflow from the capacitor to discharge the capacitor in response to thesecond control pulse signal; and comparing an intermediate voltage at anend of the capacitor to a threshold voltage to output the transitionsignal.
 20. A switching power supply comprising: a signal generatorproviding a selected signal according to a first signal and a secondsignal, the first signal having a first ripple amplitude, the secondsignal having a second ripple amplitude less than the first rippleamplitude; a controller generating a modulation signal in response tothe selected signal; and a power converter converting an input signalinto an output signal in response to the modulation signal, wherein thesignal generator includes a frequency detector comparing a firstfrequency of the first signal to a threshold frequency and generating atransition signal according to the comparison result.